Verilog
Notes. Peter Halverson
Last update 3/13/2020
http://halverscience.net/index.html
Link to
latest notes on Google Docs:
https://docs.google.com/document/d/1AlQgoPWa6F7ZnegRtAfiRT7eDqfGJjta0IMZMbRfKfI/edit?usp=sharing
These
are Halverson's personal notes. They are unedited and there
is no guarantee of accuracy. Use at your own risk. I
am making them available to you because they might actually
be helpful. If they are helpful, I would really
appreciate a "thank you".
Currently
learning on NandLand board.
https://www.nandland.com/
HIGHLY
RECOMMENDED for beginners!!!
Ideas
for next-steps in development boards
Lattice
ECP-5 Development Board. $100 Uses Lattice Diamond
software.
http://www.latticesemi.com/en/Products/DevelopmentBoardsAndKits/ECP5EvaluationBoard
Lattice
ICE40 Ultraplus breakout board $50
http://www.latticesemi.com/en/Products/DevelopmentBoardsAndKits/iCE40UltraPlusBreakoutBoard
or
iCE40 UltraPlus MDP IoT connectivity and computing
development platform $100
http://www.latticesemi.com/en/Products/DevelopmentBoardsAndKits/iCE40UltraPlusMobileDevPlatform
Fast
ADC: Analog Devices LTC2274. 105 MHz,
16 bits
https://www.analog.com/en/products/ltc2274.html#product-overview
Development
board DC1151A-C 70 MHz, 16 bit. $200 (There is a
$300 usb interface for it)
https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/dc1151a-c.html#eb-overview
Digikey
has a good list of ADC evaluation boards. Select the
"active" ones.
https://www.digikey.com/products/en/development-boards-kits-programmers/evaluation-boards-analog-to-digital-converters-adcs/791
Operators:
Basic Math: + - * / Modulus % Power (exponent)
**
Comparison:
Basic: < > >= <= Equal: == Not
equal: != ?: === !===
Bitwise:
Not: ~ And : & Or: | Xor: ^ Xnor: ^~ or
~^
Concatenation:
{ , }
USEFUL!
Strict checking of whether wires/registers have been
properly declared:
`default_nettype
none // Use this to find undeclared
wires. Remove later.
Discussion
of System Verilog:
https://verilogguide.readthedocs.io/en/latest/verilog/systemverilog.html
Discussion
of data types in Verilog:
https://verilogguide.readthedocs.io/en/latest/verilog/datatype.html
Discussions
of signed arithmetic:
https://excamera.com/sphinx/fpga-verilog-sign.html
http://billauer.co.il/blog/2012/10/signed-arithmetics-verilog/
(Useful comments about how
signed numbers are converted to unsigned by adding an extra
bit.)
Series
of lectures on Verilog:
http://web.engr.oregonstate.edu/~traylor/ece474/beamer_lectures/
Another
lecture on Verilog (from MIT)
http://web.mit.edu/6.111/www/f2017/handouts/L03_4.pdf
